Alpha Bridge AQSFP-40G-ER4
Features
- Compliant with 40G Ethernet 3ba and.
- 40GBASE-ER4 Standard.
- QSFP+ MSA compliant.
- Compliant with QDR/DDR Infiniband data rates.
- Up to 2Gb/s data rate per wavelength.
- 4 CWDM lanes MUX/DEMUX design.
- Up to 40km transmission on single mode fiber.
- (SMF).
- 5dB link insertion loss budget.
- Operating case temperature: 0 to 70oC.
- Maximum power consumption 5W.
- LC duplex connector.
- RoHS compliant.
- Digital Optical Monitoring (DOM) Enabled.
Applications
- 40GBASE-ER4 Ethernet Links.
- Infini band QDR and DDR interconnects.
- Client-side 40G Telecom connections.
Absolute Maximum Ratings AQSFP-40G-ER4
Parameter | Symbol | Min | Max | Unit |
Storage Temperature | Ts | -40 | 85 | °C |
Operating Case Temperature | TOP | 0 | 70 | °C |
Power Supply Voltage | Vcc | -0.5 | 3.6 | V |
Relative Humidity (non-condensation) | RH | 0 | 85 | % |
Damage Threshold, each Lane | THd | 3.8 | dBm |
Recommended Operating Conditions AQSFP-40G-ER4
Parameter | Symbol | Min | Typical | Max | Unit |
Operating Case Temperature | TOP | 0 | +70 | °C | |
Power Supply Voltage | Vcc | 3.135 | 3.3 | 3.465 | V |
Data Rate, each Lane | 10.3125 | 11.2 | Gb/s | ||
Control Input Voltage High | 2 | Vcc | V | ||
Control Input Voltage Low | 0 | 0.8 | V | ||
Link Distance with G.652 | D | 40 | km |
Electrical Characteristics AQSFP-40G-ER4
Parameter | Symbol | Min | Typical | Max | Unit | Notes |
Power Consumption | 3.5 | W | ||||
Supply Current | Icc | 1.1 | A | |||
Transceiver Power-on Initialization Time | 2000 | ms | 1 |
Note: Power-on Initialization Time is the time from when the power supply voltages reach and remain above the minimum recommended operating supply voltages to the time when the module is fully functional.
Optical Characteristics AQSFP-40G-ER4
Parameter | Symbol | Min | Typical | Max | Unit | Notes |
Wavelength Assignment | L0 | 1264.5 | 1271 | 1277.5 | nm | |
1284.5 | 1291 | 1297.5 | nm | |||
1304.5 | 1311 | 1317.5 | nm | |||
1324.5 | 1331 | 1337.5 | nm |
Digital Diagnostic Functions AQSFP-40G-ER4
Parameter | Symbol | Min | Max | Units | Notes |
Temperature monitor absolute error | DMI_Temp | -3 | +3 | ℃ | Over op rating temperature range |
Supply voltage monitor absolute error | DMI_VCC | -0.1 | 0.1 | V Ove | r full oper ating range |
Channel RX power monitor absolute error | DMI_RX_Ch | -2 | 2 | dB | 1 |
Channel Bias current monitor | DMI_IBias_Ch | -10% | 10% | mA | |
Channel TX power monitor absolute error | DMI_TX_Ch | -2 | 2 | dB | 1 |
Note: Due to measurement accuracy of different single mode fibers, there could be an additional +/-1 dB fluctuation, or a +/- 3 dB total accuracy.
Transmitter Electro-optical Characterstics AQSFP-40G-ER4
Parameter | Symbol | Min | Typical | Max | Unit | Notes |
Referred to | ||||||
Single-ended Input Voltage Tolerance (Note 1) | -0.3 | 4.0 | V | TP1 signal | ||
common | ||||||
AC Common Mode Input Voltage Tolerance | 15 | mV | RMS | |||
Differential Input Voltage Swing Threshold | 50 | mVpp | LOSA | |||
Differential Input Voltage Swing | Vin,pp | 190 | 700 | mVpp | ||
Differential Input Impedance | Zin | 90 | 100 | 110 | Ohm | |
Differential Input Return Loss | See IEEE 802.3ba 86A.4.11 | dB | 10MHz | |||
11.1GHz | ||||||
J2 Jitter Tolerance | Jt2 | 0.17 | UI | |||
J9 Jitter Tolerance | Jt9 | 0.29 | UI | |||
Data Dependent Pulse Width Shrinkage | 0.07 | UI | ||||
(DDPWS ) Tolerance | ||||||
Eye Mask Coordinates {X1, X2 | 0.11, 0.31 | UI | Hit Ratio = | |||
95, 350 | mV | 5x10-5 | ||||
Y1, Y2} | ||||||
Side Mode Suppression Ratio | SMSR | 30 | dB | |||
Total Average Launch Power | PT | 10.5 | dBm | |||
Average Launch Power, each Lane | PAVG | -2.7 | 4.5 | dBm | ||
Optical Modulation Amplitude (OMA), each Lane | POMA | 0.3 | 5.0 | dBm | 2 | |
Difference in Launch Power between any two Lanes (OMA) | Ptx,diff | 4.7 | dB | |||
Launch Power in OMA minus Transmitter and Dispersion Penalty (TDP), each Lane | -0.5 | dBm | ||||
TDP, each Lane | TDP | 2.6 | dB | |||
Extinction Ratio | ER | 5.5 | dB | |||
Relative Intensity Noise | RIN | -128 | dB/Hz | 12dB reflection | ||
Optical Return Loss Tolerance | TOL | 20 | dB | |||
Transmitter Reflectance | RT | -12 | dB | |||
Average Launch Power OFF Transmitter, each Lane | Poff | -30 | dBm |
Note: The single ended input voltage tolerance is the allowable range of the instantaneous input. Even if the TDP < 8 dB, the OMA min must exceed the minimum value specified here.
Receiver Electro-optical Characteristics AQSFP-40G-ER4
Parameter | Symbol | Min | Typical | Max | Unit | Notes |
Referred to | ||||||
Single-ended Output Voltage | -0.3 | 4.0 | V | signal | ||
common | ||||||
AC Common Mode Output Voltage | 7.5 | mV | RMS | |||
Differential Output Voltage Swing | Vout,pp | 300 | 850 | mVpp | ||
Differential Output Impedance | Zout | 90 | 100 | 110 | Ohm | |
Termination Mismatch at 1MHz | 5 | % | ||||
Differential Output Return Loss | See IEEE 802.3ba 86A.4.2.1 | dB | 10MHz- 11.1GHz | |||
Common Mode Output Return Loss | See IEEE 802.3ba 86A.4.2.2 | dB | 10MHz- 11.1GHz | |||
Output Transition Time | 28 | ps | 20% to 80% | |||
J2 Jitter Output | Jo2 | 0.42 | UI | |||
J9 Jitter Output | Jo9 | 0.65 | UI | |||
Eye Mask Coordinates {X1, X2 | 0.29, 0.5 | UI | Hit Ratio = | |||
Y1, Y2} | 150, 425 | mV | 5x10-5 | |||
Damage Threshold, each Lane | THd | 3.8 | dBm | 2 | ||
Average Receive Power, each Lane | -21.2 | -4.5 | dBm | |||
Receiver Reflectance | RR | -26 | dB | |||
Receive Power (OMA), each Lane | -4 | dBm | ||||
Receiver Sensitivity (OMA), each Lane | SEN | -19 | dBm | |||
Stressed Receiver Sensitivity | -16.8 | dBm | 2 | |||
(OMA), each Lane | ||||||
Difference in Receive Power between any Two Lanes (OMA) | Prx,diff | 7 | dB | |||
LOS Assert | LOSA | -35 | dBm | |||
LOS Deassert | LOSD | -20 | dBm | |||
LOS Hysteresis | LOSH | 0.5 | dB | |||
Receiver Electrical 3 dB upper Cutoff Frequency, each Lane | Fc | 12.3 | GHz | |||
Conditions of Stress Receiver Sensitivity Test (Note 3) | ||||||
Vertical Eye Closure Penalty, each Lane | 2.2 | dB | ||||
Stressed Eye J2 Jitter, each Lane | 0.3 | UI | ||||
Stressed Eye J9 Jitter, each Lane | 0.47 | UI |
- Notes: The receiver shall be able to tolerate, without damage, continuous exposure to a modulated optical input signal having this power level on one lane. The receiver does not have to operate correctly at this input power.
- Measured with conformance test signal at receiver input for BER = 1×10-12.
- Vertical eye closure penalty and stressed eye jitter are test conditions for measuring stressed receiver sensitivity. They are not characteristics of the receiver.
Block Diagram of Receiver
- This product converts the 4-channel 10Gb/s electrical input data into CWDM optical signals (light), by a driven 4- wavelength Distributed Feedback Laser (DFB) array. The light is combined by the MUX parts as a 40Gb/s data, propagating out of the transmitter module from the SMF. The receiver module accepts the 40Gb/s CWDM optical signals input, and de-multiplexes it into 4 individual 10Gb/s channels with different wavelength. Each wavelength light is collected by a discrete avalanche photodiode (APD), and then outputted as electric data after amplified first by a TIA and then by a post amplifier. Figure 1 shows the functional block diagram of this product.
- A single +3.3V power supply is required to power up this product. Both power supply pins VccTx and VccRx are internally connected and should be applied concurrently. As per MSA specifications the module offers 7 low speed hardware control pins (including the 2-wire serial interface): ModSelL, SCL, SDA, ResetL, LPMode, ModPrsL and IntL.
- Module Select (ModSelL) is an input pin. When held low by the host, this product responds to 2-wire serial communication commands. The ModSelL allows the use of this product on a single 2-wire interface bus – individual ModSelL lines must be used.
- Serial Clock (SCL) and Serial Data (SDA) are required for the 2-wire serial bus communication interface and enable the host to access the QSFP+ memory map.
- The Reset L pin enables a complete reset, returning the settings to their default state, when a low level on the ResetL pin is held for longer than the minimum pulse length. During the execution of a reset the host shall disregard all status bits until it indicates a completion of the reset interrupt. The product indicates this by posting an IntL (Interrupt) signal with the Data_Not_Ready bit negated in the memory map. Note that on power up (including hot insertion) the module should post this completion of reset interrupt without requiring a reset.
- Low Power Mode (LPMode) pin is used to set the maximum power consumption for the product in order to protect hosts that are not capable of cooling higher power modules, should such modules be accidentally inserted.
- Module Present (ModPrsL) is a signal local to the host board which, in the absence of a product, is normally pulled up to the host Vcc. When the product is inserted into the connector, it completes the path to ground though a resistor on the host board and asserts the signal. ModPrsL then indicates its present by setting ModPrsL to a “Low” state.
- Interrupt (IntL) is an output pin. “Low” indicates a possible operational fault or a status critical to the host system. The host identifies the source of the interrupt using the 2-wire serial interface. The IntL pin is an open collector output and must be pulled to the Host Vcc voltage on the Host board.
PIN Assignment AQSFP-40G-ER4
PIN | Logic | Symbol | Name/Description | Note |
1 | GND | Ground | 1 | |
2 | CML-I | Tx2n | Transmitter Inverted Data Input | |
3 | CML-I | Tx2p | Transmitter Non-Inverted Data output | |
4 | GND | Ground | 1 | |
5 | CML-I | Tx4n | Transmitter inverted Data Input | |
6 | CML-I | Tx4p | Transmitter Non-Inverted Data output | |
7 | GND | Ground | 1 | |
8 | LVTLL-I | ModSeIL | Module Select | |
9 | LVTLL-I | ResetL | Module Reset | |
10 | VccRx | +3.3V Power Supply Receiver | 2 | |
11 | LVCMOS-I/O | SCL | 2-Wire Serial Interface Clock | |
12 | LVCMOS-I/O | SDA | 2-Wire Serial Interface Data | |
13 | GNC | Ground | ||
14 | CML-O | Rx3p | Receiver Non-Inverted Data output | |
15 | CML-O | Rx3n | Receiver Inverted Data output | |
16 | GND | Ground | 1 | |
17 | CML-O | Rx1p | Receiver Non-Inverted Data Output | |
18 | CML-O | Rx1n | Receiver Inverted Data Output | |
19 | GND | Ground | 1 | |
20 | GND | Ground | 1 | |
21 | CML-O | Rx2n | Receiver Inverted Data Output | |
22 | CML-O | Rx2n | Receiver Non-Inverted Data output | |
GND | Ground | 1 | ||
24 | CML-O | Rx4n | Receiver Inverted Data output | 1 |
25 | CML-O | Rx4p | Receiver Non-Inverted Data output | |
26 | GND | Ground | 1 | |
27 | LVTTL-O | ModPrsL | Module Present | |
28 | LVTTL-O | IntL | Interrupt | |
29 | VccTx | +3.3V Power Supply transmitter | 2 | |
30 | Vcc1 | +3.3V Power Supply | 2 | |
31 | LVTTL-I | LPMode | Low Power Mode | |
32 | GND | Ground | 1 | |
33 | CML-I | Tx3p | Transmitter Non-Inverted Data Input | |
34 | CML-I | Tx3n | Transmitter Inverted Data Output | |
35 | GND | Ground | 1 | |
36 | CML-I | Tx1p | Transmitter Non-Inverted Data Input | |
37 | CML-I | Tx1n | Transmitter Inverted Data Output | |
38 | GND | Ground | 1 |
- Notes: GND is the symbol for signal and supply (power) common for QSFP+ modules. All are common within the QSFP+ module and all module voltages are referenced to this potential unless otherwise noted. Connect these directly to the host board signal common ground plane.
- VccRx, Vcc1 and VccTx are the receiving and transmission power suppliers and shall be applied Vcc Rx, Vcc1 and Vcc Tx may be internally connected within the QSFP+ transceiver module in any combination. The connector pins are each rated for a maximum current of 500mA.
Optical Receptacle Cleaning Recommendations:
All fiber stubs inside the receptacle portions were cleaned before shipment. In the event of contamination of the optical ports, the recommended cleaning process is the use of forced nitrogen. If contamination is thought to have remained, the optical ports can be cleaned using a NTT international Cletop® stick type and HFE7100 cleaning fluid. Before the mating of patch-cord, the fiber end should be cleaned up by using Cletop® cleaning cassette.