Alpha Bridge AQS56-F-07-AK

Features

  • QSFP56 MSA compliant
  • 4 parallel lanes on 850nm center wavelength
  • Compliant to IEEE 802.3cd Specification
  • Up to 70m transmission on multi-mode fiber (MMF) OM3 with FEC
  • Operating case temperature: 0 to 70°C
  • 125Gb/s electrical interface (200GAUI-4)
  • Data Rate 53.125Gbps (PAM4) per channel.
  • Maximum power consumption 5W
  • RoHS compliant

Application

  • Data Center Interconnect
  • 200G Ethernet
  • Infiniband interconnects
  • Enterprise networking

Description

This product is a high data rate parallel active optical cable (AOC), to overcome the bandwidth limitation of traditional copper cable. The AOC offers 4 independent data transmission channels and 4 data receiving channels via a multimode fiber cable, each capable of 50Gb/s operation. Consequently, an aggregate data rate of 200Gb/s over 70 meters transmission can be achieved by this product, to support the ultra-fast computing data exchange.

The product is designed with form factor, optical/electrical connection according to the QSFP56 Multi-Source Agreement (MSA). It has been designed to meet the harshest external operating conditions including temperature, humidity and EMI interference.

Functional Description

This product converts the parallel electrical input signals into parallel optical signals (light), by a driven Vertical Cavity Surface Emitting Laser (VCSEL) array. The light propagates through multimode fibers inside the fiber cable individually and is captured by the photo diode array. The optical signals are converted into parallel electrical signals and outputted. Consequently, each terminal of the cable has 8 ports, 4 for data transmission and 4 for data receiving, to provide totally 200Gb/s data exchange. Figure 1 shows the functional block diagram of the parallel AOC.

A single +3.3V power supply is required to power up this product. Both power supply pins VccTx and VccRx are internally connected and should be applied concurrently. As per MSA specifications the module offers 7 low speed hardware control pins (including the 2-wire serial interface): ModSelL, SCL, SDA, ResetL, LPMode, ModPrsL and IntL.

Module Select (ModSelL) is an input pin. When held low by the host, this product responds to 2-wire serial communication commands. The ModSelL allows the use of this product on a single 2-wire interface bus – individual ModSelL lines must be used. Serial Clock (SCL) and Serial Data (SDA) are required for the 2-wire serial bus communication interface and enable the host to access the memory map.

The ResetL pin enables a complete reset, returning the settings to their default state, when a low level on the ResetL pin is held for longer than the minimum pulse length. During the execution of a reset the host shall disregard all status bits until it indicates a completion of the reset interrupt. The product indicates this by posting an IntL (Interrupt) signal with the Data_Not_Ready bit negated in the memory map. Note that on power up (including hot insertion) the module should post this completion of reset interrupt without requiring a reset.

Initialize Mode (InitMode) is an input signal. It is pulled up to Vcc in the QSFP56 module. The InitMode signal allows the host to define whether the QSFP56 module will initialize under host software control (InitMode asserted High) or module hardware control (InitMode deasserted Low). Under host software control, the module shall remain in Low Power Mode until software enables the transition to High Power Mode, as defined in the QSFP56 Management Interface Specification. Under hardware control (InitMode de-asserted Low), the module may immediately transition to High Power Mode after the management interface is initialized. The host shall not change the state of this signal while the module is present. In legacy QSFP applications, this signal is named LPMode. See SFF-8679 for LPMode signal description.

Module Present (ModPrsL) is a signal local to the host board which, in the absence of a product, is normally pulled up to the host Vcc. When the product is inserted into the connector, it completes the path to ground through a resistor on the host board and asserts the signal. ModPrsL then indicates its present by setting ModPrsL to a “Low” state.

Interrupt (IntL) is an output pin. “Low” indicates a possible operational fault or a status critical to the host system. The host identifies the source of the interrupt using the 2-wire serial interface. The IntL pin is an open collector output and must be pulled to the Host Vcc voltage on the Host board.

Absolute Maximum Ratings

Parameter Symbol Min. Max. Units
Storage Temperature TS -40 85 °C
Operating Case Temperature Top 0 70 °C
Power Supply Voltage Vcc -0.5 3.6 V
Relative Humidity (non-condensation) RH 0 85 %

Recommended Operating Conditions

Parameter Symbol Min. Typical Max. Units Note
Operating Case Temperature Top 0   70 °C  
Power Supply Voltage Vcc 3.135 3.3 3.465 V  
Data Rate, each Lane     26.5625   GBd PAM4
Data Rate Accuracy   -100   100 ppm  
Pre-FEC Bit Error Ratio       2.4x10-4    
Post-FEC Bit Error Ratio       1x10-12   1
Link Distance with OM3 D 0.5   70 m 2

Digital Diagnostic Functions

Parameter Symbol Min Max Units Notes
Temperature monitor absolute error DMI_Temp -3 3 °C Over operating temperature range
Supply voltage monitor absolute error DMI _VCC -0.1 0.1 V Over full operating range
Channel RX power monitor absolute error DMI_RX_Ch -2 2 dB 1
Channel Bias current monitor DMI_Ibias_Ch -10% 10% mA  
Channel TX power monitor absolute error DMI_TX_Ch -2 2 dB 1

Electrical Characteristics

Parameter Symbol Min Typical Max Units Notes
Power Consumption       5 W  
Supply Current Icc     1.52 A  

Transmitter Electrical Characteristics (each lane)

Parameter Symbol Min Typical Max Units Notes
Signaling Rate, each Lane TP1 26.5625 ± 100 ppm GBd  
Differential pk-pk Input Voltage Tolerance TP1a 900     mVpp 1
Differential Termination Mismatch TP1     10 %  
Differential Input Return Loss TP1 IEEE 802.3-2015 Equation (83E-5) dB  
Differential to Common Mode Input Return Loss TP1 IEEE 802.3-2015 Equation (83E-6) dB  
Module Stressed Input Test TP1a See IEEE 802.3bs 120E.3.4.1   2
Single-ended Voltage Tolerance Range (Min) TP1a -0.4 to 3.3 V  
DC Common Mode Input Voltage TP1 -350   2850 mV 3

Transmitter Optical Characteristics (each lane)

Parameter Symbol Min Typical Max Units Notes
Signaling Rate, each Lane TP4 26.5625 ± 100 ppm GBd
Differential Peak-to-Peak Output Voltage TP4     900 mVpp  
Common Mode vOLTAGE TP4 -350   2850 mV  
AC Common Mode Output Voltage, RMS TP4     17.5 mV  
Differential Termination Mismatch TP4     10 %  
Differential Output Return Loss TP4 IEEE 802.3 2015 Equation (83E-2)
Common to Differential Mode Conversion Return Loss TP4 IEEE 802.3 2015 Equation (83E-3)
Transition Time, 20% to 80% TP4 9.5     ps  
Near-end Eye Symmetry Mask Width (ESMW) TP4   0.265   UI  
Near-end Eye Height, Differential TP4 70     mV  
Far-end Eye Symmetry Mask Width (ESMW) TP4   0.2   UI  
Far-end Eye Height, Differential TP4 30     mV  
Far-end Pre-cursor ISI Ratio TP4 -4.5   2.5 %  
Common Mode Output Voltage (Vcm) TP4 -350   2850 mV 1

Pin Definition

Pin Logic Symbol Description Notes
1   GND Ground 1
2 CML-I Tx2n Transmitter Inverted Data Input  
3 CML-I Tx2p Transmitter Non-inverted Data Input  
4   GND Ground 1
5 CML-I Tx4n Transmitter Inverted Data Input  
6 CML-I Tx4p Transmitter Non-inverted Data Input  
7   GND Ground 1
8 LVTTL-I ModSeIL Module Select  
9 LVTTL-I ResetL Module Reset  
10   VccRx +3.3V Power Supply Receiver 2
11 LVCMOS-I/O SCL 2-Wire Serial Interface Clock  
12 LVCMOS-I/O SDA 2-Wire Serial Interface Data  
13   GND Ground  
14 CML-O Rx3p Receiver Non-Inverted Data Output  
15 CML-O Rx3n Receiver Inverted Data Output  
16   GND Ground 1
17 CML-O Rx1p Receiver Non-Inverted Data Output  
18 CML-O Rx1n Receiver Inverted Data Output  
19   GND Ground 1
20   GND Ground 1
21 CML-O Rx2n Receiver Inverted Data Output  
22 CML-O Rx2p Receiver Non-Inverted Data Output  
23   GND Ground 1
24 CML-O Rx4n Receiver Inverted Data Output  
25 CML-O Rx4p Receiver Non-Inverted Data Output  
26   GND Ground 1
27 LVTTL-O ModPrsL Module Present  
28 LVTTL-O IntL Interrupt  
29   VccTx +3.3V Power Supply Transmitter 2
30   Vcc1 +3.3V Power Supply 2
31 LVTTL-1 LPMode Low Power Mode  
32   GND Ground 1
33 CML-I Tx3p Transmitter Non-Inverted Data Input  
34 CML-I Tx3n Transmitter Inverted Data Input  
35   GND Ground 1
36 CML-I Tx1p Transmitter Non-Inverted Data Input  
37 CML-I Tx1n Transmitter Inverted Data Input  
38   GND Ground 1

Ordering Information

Part Number Model Number Length (M) Voltage Temperature
  AQS56-F-03-AK 200G QSFP56 AOC 3 3.3V 0°C to 70 °C
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